fb2XGhh@V7 FPGA Card

Dual SFP+ Port 1/10 Gigabit Ethernet PCI Express FPGA Card

The fb2XGhh@7 series is a half height high performance OEM hardware platform for 1G and 10 Gigabit Ethernet with dual port SFP+ network interface.

The standard configuration is based on Xilinx Virtex7 VX690T FPGA. The card is also offered with a variety of different FPGAs to provide flexibility for the intended application.

fb2XGhh@V7 FPGA Card

Dual SFP+ Port 1/10 Gigabit Ethernet PCI Express FPGA Card

Host Interface:

Physical bus connector: 8-lane PCIe
PCIe bus type: 1-8 lane PCIe Gen1/Gen2/Gen3

Network Interface:

IEEE standard: IEEE 802.3 10 Gbit/s Ethernet
Physical interface: 2 x SFP+ ports
Supported SFP+ modules: Multimode SR (850 nm), singlemode LR (1310 nm), multimode LRM (1310 nm), singlemode ER (1550 nm) or Direct Attached Copper (Twinax)
Data rate: 2 x 10 Gbit/s
Ethernet PHY directly embedded in FPGA for full packet control

Configuration:

16 bit fast parallel programming interface from supporting preprogrammed controller
Configuration flash supports two boot images with automatic fallback to fail safe image if first image fails
Support for encrypted FPGA bit file (optional)
Upload of FPGA configuration to flash via PCIe

fb2XGhh@V7 FPGA Card

Dual SFP+ Port 1/10 Gigabit Ethernet PCI Express FPGA Card

General Technical Specifications
On Board Clock:	PCIe clock: 100MHz 125 MHz oscillator 156.25 MHz oscillator
On Board Memory:	1 x 64 bit DDR3@1800MT/s 4GB 1 MB user configurable space in flash for permanent storage
FPGA:	fb2XGhh@V7690: Xilinx Virtex7 XC7VX690T-2 fb2XGhh@V7330: Xilinx Virtex7 XC7VX330T-2 Xilinx Virtex7 XC7VX415T (optional)
Environment:
Physical dimensions:	half length, half height PCIe
Power consumption:	less than 6W with uninitialized FPGA
Operating temperature:	0 – 55°C, 30 – 130°F
Operating humidity:	20 – 80%
Hardware compliance:	RoHS, CE
Passive cooling:	no on-board fan required
Additional Board Support:	On board temperature sensor Board status LED 2 user configurable dual color LED FPGA controlled Link and Activity LED for each port PPS clock synchronization connector
Additional Intellectual Property Support:	Flash configuration I/F 8 lane PCIe DDR3 Memory controller Fast Ethernet MAC (optional) MDIO controller (optional) I2C controller (optional) SPI master I/F (optional) TCP-offload engine (optional)