MicroBMC

pfSense Based BMC Module

Open-Source, Low-cost, RESTful BMC based on pfSense security gateway software
Targeted at NFV edge appliances
TI ARM Cortex-A8 module
Security and extensibility of pfSense are foundational to MicroBMC
Alpha sampling now, Production and open collateral posting Q1 2017
Development Kit available

MicroBMC

pfSense Based BMC Module

General Technical Specifications
Form Factor:	27mm x 54mm Module
CPU:	TI AM3352 ARM Cortex-A8, including crypto accelerator, 300 or 600 MHz (The following specs are for ADI's TI A8 based MicroBMC module) Intel Quark X1000 module under development (implementation-dependent specs may vary from the following)
DRAM:	256 or 512MB DDR3, memory down
Ethernet:	Integrated on-board 3-port managed GbE switch Two external 1GbE switch ports on module connector for external management port and connection to main system CPU
Flash:	eMMC on-board, 4GB (custom build options support up to 64GB)
Voltage Monitoring:	8x motherboard power supply voltage monitoring analog inputs Expandable with optional analog MUX on motherboard
Fan Control:	2x independent PWM output / tachometer inputs fan channels
PSU Monitoring:	4x PSU powergood inputs
GPIO:	8x user-defined digital I/O pins
RTC:	Yes, for timestamp of FRU EEPROM event log entries
Virtual Media:	USB device connection to host CPU for USB boot over LAN
CPU Status Monitoring:	Sleep S3, S4, S5 indicators PROCHOT#, THERMTRIP# thermal indicators CPU error indicators Platform reset
CPU Power State Control:	Reset button control Power button control
Heartbeat Monitoring:	Software GPIO on host CPU drives watchdog input on µBMC
I2C:	Bus 0 (master). Onboard FRU EEPROM, connectivity for motherboard discrete thermal sensors and other devices Bus 1 (master). Access to PECI SMBus slave inside host CPU. Used for monitoring CPU die temperature.
SPI:	Used to access host CPU boot flash for remote BIOS updates
EEPROM:	32kB I2C EEPROM on board, for management event logging
Power:	3.3VDC and 5VDC
Temperature:	Operating: 0-70C Storage: -20-85C